Integrated circuits that are designed to work over multiple power supply voltage ranges often contain sub-circuits that are voltage range sensitive. For example, setting the switch point voltage to the proper level for a Low Voltage Detection (LVD) circuit depends on the supply voltage level. Still another example is that non-volatile memory such as Electronically Erasable Programmable Read Only Memory (EEPROM) requires ramp rate control which controls how fast the internal charge pump pumps. Also, the number of stages required in the charge pump of the EEPROM may vary depending upon the particular supply voltage. Still further, the integrated circuit pad characteristics, such as AC timing and DC characteristics, should be controlled to compensate for supply voltage range to optimize performance.
There are a substantial number of functions such as the LVD on various integrated circuits that must be optimized for the chip's operating voltage. Obviously, a chip that can function over multiple voltage ranges will have to accommodate for this optimization. In the past, the problem was avoided by generating separate chip layouts for each voltage operating range, so that each mask would be optimized for a particular operating range. As will be appreciated, this solution requires separate masks be designed and laid out and separate chips be produced and inventoried for each desired voltage operating range. This complicates the design, production, integration and inventory for both the chip manufacturer producing the different versions of the chip and the system manufacturer that will use the chips. These problems multiply as the number of potential operating ranges, and therefore chip versions, increases.
Another solution used in the prior art is to develop a chip design that can operate at multiple voltage levels. However, such a chip design has required the addition of multiple pins to the chip so that a desired power supply operating range may be programmed. As will be appreciated, these additional pins increase the chip's footprint and board layout. Also, this solution complicates the chip design and user system integration by requiring external control circuitry.
As can be seen, it would be desirable to provide an integrated circuit that enables a chip to automatically configure itself to optimally perform at a given voltage range. Such a circuit would simplify manufacturing, inventory control and integration by not requiring multiple versions of the same integrated circuit chip, and it would not increase chip area by adding pins or require external, multiple supply, control circuitry.